1. Field of the Invention
The present invention relates to a semiconductor module and a motherboard having the semiconductor module mounted thereon, and more particularly relates to a semiconductor module supplied with a signal of which the logic level is fixed during a normal operation, such as a reset signal, and a signal of which the logic level changes during a normal operation, such as an address signal, and a motherboard having the semiconductor module mounted thereon.
2. Description of Related Art
A semiconductor chip such as a DRAM (Dynamic Random Access Memory) has a reset terminal for receiving a reset signal in some cases (see Japanese Patent Application Laid-open No. 2007-95278). The reset signal is activated at the time of start-up immediately after power supply or the like, thereby initializing the entire chip. Because the reset signal is activated only when the entire chip needs to be initialized, the reset signal is fixed to an inactive level during the normal operation after the start-up.
However, a phenomenon sometimes occurs that, although the reset signal is properly fixed to an inactive level by a controller, the reset signal is incidentally activated, so that the semiconductor chip is initialized.